Unless you want to get a beautiful spectrum on a EMI/EMC test receiver, but it's certainly not relevant in this project... Building a discrete CPU at some MHz and passing modern EMI/EMC tests sound like a fun (and somewhat expensive [1]) nerd-snipping project to do.
[1] The expense of EMI/EMC tests at an actual lab is well-known. Doing it in a home lab at a much lower expense is possible with pre-compliance tools like a TEM cell, a broadband antenna and a spectrum analyzer, but these equipment still costs a few thousand dollars.
If he uses HC logic and is careful to keep traces pulled back from the edge of the pcbs, and also carefully deals with the interconnects (those might be the killer) then he could probably pass EMC. Maybe some series termination on the clock tree.
At the speed it's running, the edge rates of the IO drivers and the input/output of the entire thing are the problem.
A simple improvement of the interconnect is using two rows of pin headers, one rows for signals and another rows for dedicated grounds. This should significantly reduce the loop area. I once did a quick simulation and found that even controlled impedance is somewhat possible with 1.27 mm headers, although I haven't done any experiment with it (yet)... Another possible modification is converting all I/Os to differential signaling before they leave the board, a classic use is eliminating the radiation from long ribbon cables. Ribbon cables with ground planes also do exist if one's willing to pay...
[1] The expense of EMI/EMC tests at an actual lab is well-known. Doing it in a home lab at a much lower expense is possible with pre-compliance tools like a TEM cell, a broadband antenna and a spectrum analyzer, but these equipment still costs a few thousand dollars.